Chung-Hua University Repository:Item 987654321/33527
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    Please use this identifier to cite or link to this item: http://chur.chu.edu.tw/handle/987654321/33527


    Title: FPGA Implementation of High Performance DCT/IDCT Processor
    Authors: 謝曜式
    Shieh, Yaw-Shih
    Contributors: 電子工程學系
    Electronics Engineering
    Keywords: DCT/IDCT;subband decomposition;linear array;pipelined;scable;FPGA
    Date: 2011
    Issue Date: 2014-06-27 02:24:48 (UTC+8)
    Abstract: Discrete cosine transform (DCT) and inverse DCT (IDCT) are important in various image processing systems. In this paper, a novel linear array of simple compuations is pro[osed for DCT/IDCT, which is based on the subband decompositions of a signal. To in
    Appears in Collections:[Department of Microelectronics] Seminar Papers

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