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    Please use this identifier to cite or link to this item: http://chur.chu.edu.tw/handle/987654321/32400


    Title: 有效減少低密度同位元檢查碼中陷阱集合數量之演算法
    Authors: 王俊鑫
    Wang, Chun-Hsin
    Contributors: 資訊工程學系
    Computer Science & Information Engineering
    Keywords: 陷阱集合;錯誤率平緩現象;低 密 度 同 位 元 檢 查 碼 。
    trapping sets;error floor;low-density parity-check codes
    Date: 2011
    Issue Date: 2014-06-27 01:53:10 (UTC+8)
    Abstract: 在本篇論文中,我們探討如何在建構低密度同位元檢查 碼(low-density parity-check codes;LDPC)時,藉由降低陷阱集合(Trapping set;TS)的數量,來改進其效能,尤 其是在高雜訊比(Signal to Noise Ratio;SNR)之下的錯誤 率平緩現象(error floor)。在消除陷阱集合的演算法中,我們觀察出凍結,分階段和換邊的選擇這三個不同動作的組合,對於降低陷阱集合的數量有不同的影響。利用每次選邊時,計算出所有邊的結果,且選擇其中最合適的,雖然複雜度高
    In this paper, we discusse how to construct low-density parity-check (LDPC) codes, and algorithm to improve the performance (error floor) in the high SNR region by reducing trapping sets. We observe that in the trapping set elimination algorithm, choices
    Appears in Collections:[Department of Computer Science and Information Engineering] Seminar Papers

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