Assignment of Adjustable Delay Buffers for Clock Skew Minimization in Multi-Voltage Mode Designs

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Title:	Assignment of Adjustable Delay Buffers for Clock Skew Minimization in Multi-Voltage Mode Designs
Authors:	顏金泰 YAN, JIN-TAI
Contributors:	資訊工程學系 Computer Science & Information Engineering
Keywords:	ADB;Clock skew
Date:	2013
Issue Date:	2014-06-27 01:42:26 (UTC+8)
Abstract:	It is well known that clock skew minimization becomes critical in high-performance VLSI designs. In this paper, the assignment of adjustable delay buffers(ADBs) is applied to minimize the clock skew in a buffered clock tree in a multi-voltage mode design.
Appears in Collections:	[Department of Computer Science and Information Engineering] Seminar Papers

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