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顯示項目251-275 / 310. (共13頁) << < 4 5 6 7 8 9 10 11 12 13 > >> 每頁顯示[10|25|50]項目

日期	題名	作者
2009	A Simple Rate Distortion Estimation for Embedded Block Coding	宋志雲; Sung, Tze-Yun
2008	SMU Architecture - High Current Resolution	賴瓊惠; Lai, Chiung-Hui
2013	Stand-up helper seat起身輔助座	宋志雲; Sung, Tze-Yun
2008	A Superior Algorithm for Resizing Images by using the Subband DCT	謝曜式; Shieh, Yaw-Shih
2012	SURFACE PASSIVATION EFFECT IN SGOI NANOWIRE BIOSENSOR WITH HIGH GE FRACTION	賴瓊惠; Lai, Chiung-Hui
2013	Tape Cutter膠帶切割器	宋志雲; Sung, Tze-Yun
2009	Trap Profile and Bias Temperature Instability of ALD-HfSiON Gate Stacks in Advanced MOSFETs	吳建宏; rossiwu
2006	Two Fast Architectures for 2-D DWT and IDWT Using 4-Tap Daubechies Filters	宋志雲; Sung, Tze-Yun
2008	Two-quadrant CMOS Approximation Divider	林國珍; Lin, Kuo-Jen
2008	Two-Quadrant CMOS Plug-in Divider	林國珍; Lin, Kuo-Jen
2009	Two-Quadrant Compact CMOS Current Divider	林國珍; Lin, Kuo-Jen
2012	A Unified Algorithm for Subband-Based Discrete Cosine Transform	謝曜式; Shieh, Yaw-Shih
2012	A Unified Algorithm for Subband-Based Discrete Cosine Transform	宋志雲; Sung, Tze-Yun
2006	VLSI Architectures for 2-D Forward and Inverse Discrete Wavelet Transform Using 4-tap Daubechies Filters	謝曜式; Shieh, Yaw-Shih
2006	VLSI Architectures for 2-D Forward and Inverse Discrete Wavelet Transform Using 4-tap Daubechies Filters	宋志雲; Sung, Tze-Yun
2006	VLSI Implementation of 2-D Discrete Cosine Transform Architecture Based on CORDIC Rotation	宋志雲; Sung, Tze-Yun
2006	VLSI Implementation of 2-D Discrete Cosine Transform Architecture Based on CORDIC Rotation,	謝曜式; Shieh, Yaw-Shih
2005	VLSI Implementation of a CORDIC-Based 2-D Discrete Cosine Transform and Its Inverse	謝曜式; Shieh, Yaw-Shih
2005	VLSI Implementation of a CORDIC-Based 2-D Discrete Cosine Transform and Its Inverse	宋志雲; Sung, Tze-Yun
2006	VLSI Implementation of A High-Efficient and Cost-Effective LCD Signal Processor	宋志雲; Sung, Tze-Yun
2006	VLSI Implementation of a High-Efficient and Cost-Effective LCD Singal Processor,	謝曜式; Shieh, Yaw-Shih
2006	VLSI Implementation of A High-Efficient Image Scalar Algorithm for LCD Signal Processor	謝曜式; Shieh, Yaw-Shih
2006	VLSI Implementation of A High-Efficient Image Scalar Algorithm for LCD Signal Processor	宋志雲; Sung, Tze-Yun
2005	VLSI Implementation of a Memory-Efficient and High-Speed Split-Radix FFT/IFFT Processor for Wireless LAN	宋志雲; Sung, Tze-Yun
2005	VLSI Implementation of a Memory-Efficient and High-Speed Split-Radix FFT/IFFT Processor for Wireless LAN	謝曜式; Shieh, Yaw-Shih

顯示項目251-275 / 310. (共13頁) << < 4 5 6 7 8 9 10 11 12 13 > >> 每頁顯示[10|25|50]項目