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    Please use this identifier to cite or link to this item: http://chur.chu.edu.tw/handle/987654321/33307


    Title: A Novel VLSI Architecture for Digital Frequency Synthesizer
    Authors: 宋志雲
    Sung, Tze-Yun
    Contributors: 電子工程學系
    Electronics Engineering
    Keywords: Digital frequency synthesis;Difference equation;SFDR;PSNR;VLSI
    Date: 2012
    Issue Date: 2014-06-27 02:20:44 (UTC+8)
    Abstract: This paper presents a novel algorithm and architecture for digital frequency synthesis (DFS). It is based on a simple difference equation. Simulation results show that the proposed DFS algorithm is preferable to the conventional phase-locked-loop frequenc
    Appears in Collections:[Department of Microelectronics] Seminar Papers

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