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顯示項目1801-1825 / 14866. (共595頁) << < 68 69 70 71 72 73 74 75 76 77 > >> 每頁顯示[10|25|50]項目

日期	題名	作者
2005	Archery releasing style of an Olympic bronze medal archer	黃啟光; Hwang, Chi-Kuang
2006	Architectural layout optimization using annealed neural network	葉怡成; Yeh, I-Cheng
2006	The Architecture of Computational Design System for Capacity Design Methodology	林政達; Lin, Cheng-Tah
2011	Are Social Responsibility Practices Adopted For The Right Reasons?	楊振隆; Yang, chen-lung
2011	Are supply chain management theories culturally constrained? An empirical assessment	楊振隆; Yang, chen-lung
2009	Are Travel Agents in Taiwan Ready for Computer Technology?	陳俐文; Chen, Li-wen
2006	Are Travel Agents Ready for Computer Technology.	陳俐文; Chen, Li-wen
2005	Area and Throughput Trade-offs in The Design of Pipelined 2-D Discrete Wavelet Transform Architectures	林國珍; Lin, Kuo-Jen
2005	Area and Throughput Trade-offs in The Design of Pipelined 2-D Discrete Wavelet Transform Architectures	謝曜式; Shieh, Yaw-Shih
2005	Area and Throughput Trade-offs in The Design of Pipelined 2-D Discrete Wavelet Transform Architectures	宋志雲; Sung, Tze-Yun
2012	Area Coverage Enhancement Schemes in Directional Sensor Networks	梁秋國; Liang, Chiu-Kuo
2005	Area, Power and Throughput Trade-Offs for 2-D Inverse Discrete Wavelet Transform Architectures Using Direct Form	林國珍; Lin, Kuo-Jen
2005	Area, Power and Throughput Trade-Offs for 2-D Inverse Discrete Wavelet Transform Architectures Using Direct Form	謝曜式; Shieh, Yaw-Shih
2005	Area, Power and Throughput Trade-Offs for 2-D Inverse Discrete Wavelet Transform Architectures Using Direct Form	宋志雲; Sung, Tze-Yun
2005	Area, Power and Throughput Trade-Offs in the Design of Pipelined 2-D Discrete Wavelet Transform Architectures Using Direct Cascading Form	林國珍; Lin, Kuo-Jen
2005	Area, Power and Throughput Trade-Offs in the Design of Pipelined 2-D Discrete Wavelet Transform Architectures Using Direct Cascading Form	謝曜式; Shieh, Yaw-Shih
2005	Area, Power and Throughput Trade-Offs in the Design of Pipelined 2-D Discrete Wavelet Transform Architectures Using Direct Cascading Form	宋志雲; Sung, Tze-Yun
2007	Area-Driven Decoupling Capacitance Allocation Based on Space Sensitivity Analysis for Signal Integrity	顏金泰; YAN, JIN-TAI
2007	Area-Driven Decoupling Capacitance Allocation in Noise-Aware Floorplan for Signal Integrity	顏金泰; YAN, JIN-TAI
2006	Area-Driven White Space Distribution for Detailed Floorplan Design	顏金泰; YAN, JIN-TAI
2009	ARIMA-BPN時間數列神經網路	葉怡成; Yeh, I-Cheng
2005	ARINC 429 航電儀表通訊介面功能測試與評估系統平台設計	林君明; Lin, Jium-Ming
2004	ARINC 429航空儀表通訊介面功能測試與評估系統平台設計	林君明; Lin, Jium-Ming
2004	ARINC 429航電儀表通訊介面功能測試與評估系統平台設計	林君明; Lin, Jium-Ming
2008	Arithmetic Unit for Finite Field GF(2^m)	陳棟洲; Chen, Tung-Chou

顯示項目1801-1825 / 14866. (共595頁) << < 68 69 70 71 72 73 74 75 76 77 > >> 每頁顯示[10|25|50]項目